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| 24AA512/24LC512/24FC512 512K I2CTM CMOS Serial EEPROM Device Selection Table Part Number 24AA512 24LC512 24FC512 Note 1: VCC Range 1.8-5.5V 2.5-5.5V 2.5-5.5V Max. Clock Frequency 400 kHz(1) 400 kHz 1 MHz Temp. Ranges I I, E I Description: The Microchip Technology Inc. 24AA512/24LC512/ 24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial Electrically Erasable PROM, capable of operation across a broad voltage range (1.8V to 5.5V). It has been developed for advanced, low-power applications such as personal communications and data acquisition. This device also has a page write capability of up to 128 bytes of data. This device is capable of both random and sequential reads up to the 512K boundary. Functional address lines allow up to eight devices on the same bus, for up to 4 Mbit address space. This device is available in the standard 8-pin plastic DIP, SOIC, DFN and 14-lead TSSOP packages. 100 kHz for VCC < 2.5V Features: * Low-power CMOS technology: - Maximum write current 5 mA at 5.5V - Maximum read current 400 A at 5.5V - Standby current 100 nA typical at 5.5V * 2-wire serial interface bus, I2CTM compatible * Cascadable for up to eight devices * Self-timed erase/write cycle * 128-byte Page Write mode available * 5 ms max. write cycle time * Hardware write-protect for entire array * Schmitt Trigger inputs for noise suppression * 1,000,000 erase/write cycles * Electrostatic discharge protection > 4000V * Data retention > 200 years * 8-pin PDIP, SOIC (208 mil), and DFN packages * 14-lead TSSOP package * Standard and Pb-free finishes available * Temperature ranges: - Industrial (I): -40C to +85C - Automotive (E): -40C to +125C Block Diagram A0 A1 A2WP HV Generator I/O Control Logic Memory Control Logic XDEC EEPROM Array Page Latches I/O SCL YDEC SDA VCC VSS Sense Amp. R/W Control Package Type PDIP A0 A1 A2 VSS 1 24XX512 2 3 4 8 7 6 5 VCC WP SCL SDA A0 A1 A2 VSS 1 24XX512 2 3 4 SOIC 8 7 6 5 VCC WP SCL SDA A0 A1 NC NC NC A2 VSS 1 2 3 4 5 6 7 TSSOP 14 13 12 11 10 9 8 VCC WP NC NC NC SCL SDA A0 A1 A2 VSS 1 2 3 4 24XX512 DFN 8 VCC 7 WP 6 SCL 5 SDA * 24XX512 is used in this document as a generic part number for the 24AA512/24LC512/24FC512 devices. (c) 2005 Microchip Technology Inc. 24XX512 DS21754F-page 1 24AA512/24LC512/24FC512 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings () VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied ................................................................................................-40C to +125C ESD protection on all pins ...................................................................................................................................................... 4 kV NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. TABLE 1-1: DC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.8V to 5.5V Automotive (E): VCC = +2.5V to 5.5V Min -- 0.7 VCC -- 0.05 VCC Max -- -- 0.3 VCC 0.2 VCC -- Units -- V V V V -- -- VCC 2.5V VCC < 2.5V VCC 2.5V (Note) TA = -40C to +85C TA = -40C to +125C Conditions DC CHARACTERISTICS Param. No. D1 D2 D3 D4 -- VIH VIL VHYS Sym Characteristic A0, A1, A2, SCL, SDA and WP pins: High-level input voltage Low-level input voltage Hysteresis of Schmitt Trigger inputs (SDA, SCL pins) Low-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs) D5 D6 D7 D8 D9 D10 VOL ILI ILO CIN, COUT ICC Write ICCS -- -- -- -- -- -- -- 0.40 1 1 10 400 5 1 V A A pF A mA A IOL = 3.0 ma @ VCC = 4.5V IOL = 2.1 ma @ VCC = 2.5V VIN = VSS or VCC, WP = VSS VIN = VSS or VCC, WP = VCC VOUT = VSS or VCC VCC = 5.0V (Note) TA = 25C, fC = 1 MHz VCC = 5.5V, SCL = 400 kHz VCC = 5.5V TA = -40C to +85C SCL = SDA = VCC = 5.5V A0, A1, A2, WP = VSS TA = -40C to +125C SCL = SDA = VCC = 5.5V A0, A1, A2, WP = VSS ICC Read Operating current Standby current -- 5 A Note: This parameter is periodically sampled and not 100% tested. DS21754F-page 2 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 TABLE 1-2: AC CHARACTERISTICS Electrical Characteristics: Industrial (I): VCC = +1.8V to 5.5V Automotive (E): VCC = +2.5V to 5.5V Characteristic Clock frequency Min -- -- -- 4000 600 500 4700 1300 500 -- -- -- -- -- 4000 600 250 4700 600 250 0 250 100 100 4000 600 250 4000 600 600 4700 1300 1300 -- -- -- 4700 1300 500 -- -- 1,000,000 Max 100 400 1000 -- -- -- -- -- -- 1000 300 300 300 100 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 3500 900 400 -- -- -- 50 5 -- Units kHz TA = -40C to +85C TA = -40C to +125C Conditions 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC< 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 All except, 24FC512 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 (Note 2) 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 1.8V VCC < 2.5V 2.5V VCC 5.5V 2.5V VCC 5.5V 24FC512 All except, 24FC512 (Notes 1 and 3) -- 25C (Note 4) AC CHARACTERISTICS Param. No. Sym FCLK 1 2 THIGH Clock high time ns 3 TLOW Clock low time ns 4 TR SDA and SCL rise time (Note 1) ns 5 6 TF SDA and SCL fall time (Note 1) ns ns THD:STA Start condition hold time 7 TSU:STA Start condition setup time ns 8 9 THD:DAT Data input hold time TSU:DAT Data input setup time ns ns 10 TSU:STO Stop condition setup time ns 11 TSU:WP WP setup time ns 12 THD:WP WP hold time ns 13 TAA Output valid from clock (Note 2) ns 14 TBUF Bus free time: Time the bus must be free before a new transmission can start Input filter spike suppression (SDA and SCL pins) Write cycle time (byte or page) Endurance ns 16 17 18 Note 1: 2: 3: 4: TSP TWC -- ns ms cycles Not 100% tested. CB = total capacitance of one bus line in pF. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which can be obtained from Microchip's web site: www.microchip.com. (c) 2005 Microchip Technology Inc. DS21754F-page 3 24AA512/24LC512/24FC512 FIGURE 1-1: BUS TIMING DATA 5 2 D4 4 SCL SDA IN 7 6 16 3 8 9 10 13 SDA OUT (protected) (unprotected) 14 WP 11 12 DS21754F-page 4 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: Name A0 A1 (NC) A2 VSS SDA SCL (NC) WP VCC PIN FUNCTION TABLE PDIP 1 2 -- 3 4 5 6 -- 7 8 SOIC 1 2 -- 3 4 5 6 -- 7 8 14-lead TSSOP 1 2 3, 4, 5 6 7 8 9 10, 11, 12 13 14 DFN 1 2 -- 3 4 5 6 -- 7 8 Function User Configured Chip Select User Configured Chip Select Not Connected User Configured Chip Select Ground Serial Data Serial Clock Not Connected Write-Protect Input +1.8V to 5.5V (24AA512) +2.5V to 5.5V (24LC512) +2.5V to 5.5V (24FC512) 2.1 A0, A1 and A2 Chip Address Inputs 2.3 Serial Clock (SCL) The A0, A1 and A2 inputs are used by the 24XX512 for multiple device operations. The logic levels on these inputs are compared with the corresponding bits in the slave address. The chip is selected if the compare is true. Up to eight devices may be connected to the same bus by using different Chip Select bit combinations. If these pins are left unconnected, the inputs will be pulled down internally to VSS. If they are tied to VCC or driven high, the internal pull-down circuitry is disabled. In most applications, the chip address inputs A0, A1, and A2 are hard-wired to logic `0' or logic `1'. For applications in which these pins are controlled by a microcontroller or other programmable logic device, the chip address pins must be driven to logic `0' or logic `1' before normal device operation can proceed. This input is used to synchronize the data transfer from and to the device. 2.4 Write-Protect (WP) This pin can be connected to either VSS or VCC. Internal pull-down circuitry on this pin will keep the device in the unprotected state if left floating, however, floating this pin is not recommended for most applications. If tied to VSS, normal memory operation is enabled (read/write the entire memory 0000-FFFF). If tied to VCC, write operations are inhibited. Read operations are not affected. 3.0 FUNCTIONAL DESCRIPTION 2.2 Serial Data (SDA) This is a bidirectional pin used to transfer addresses and data into and data out of the device. It is an opendrain terminal, therefore, the SDA bus requires a pullup resistor to VCC (typical 10 k for 100 kHz, 2 k for 400 kHz and 1 MHz). For normal data transfer, SDA is allowed to change only during SCL low. Changes during SCL high are reserved for indicating the Start and Stop conditions. The 24XX512 supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The bus must be controlled by a master device which generates the serial clock (SCL), controls the bus access and generates the Start and Stop conditions, while the 24XX512 works as a slave. Both master and slave can operate as a transmitter or receiver, but the master device determines which mode is activated. (c) 2005 Microchip Technology Inc. DS21754F-page 5 24AA512/24LC512/24FC512 4.0 BUS CHARACTERISTICS 4.5 Acknowledge The following bus protocol has been defined: * Data transfer may be initiated only when the bus is not busy. * During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line, while the clock line is high, will be interpreted as a Start or Stop condition. Accordingly, the following bus conditions have been defined (Figure 4-1). Each receiving device, when addressed, is obliged to generate an Acknowledge signal after the reception of each byte. The master device must generate an extra clock pulse which is associated with this Acknowledge bit. See Figure 4-2 for acknowledge timing. Note: The 24XX512 does not generate any Acknowledge bits if an internal programming cycle is in progress. 4.1 Bus Not Busy (A) Both data and clock lines remain high. 4.2 Start Data Transfer (B) A high-to-low transition of the SDA line while the clock (SCL) is high determines a Start condition. All commands must be preceded by a Start condition. A device that acknowledges must pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. During reads, a master must signal an end of data to the slave by NOT generating an Acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24XX512) will leave the data line high to enable the master to generate the Stop condition. 4.3 Stop Data Transfer (C) A low-to-high transition of the SDA line while the clock (SCL) is high determines a Stop condition. All operations must end with a Stop condition. 4.4 Data Valid (D) The state of the data line represents valid data when, after a Start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line must be changed during the low period of the clock signal. There is one bit of data per clock pulse. Each data transfer is initiated with a Start condition and terminated with a Stop condition. The number of the data bytes transferred between the Start and Stop conditions is determined by the master device. DS21754F-page 6 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 FIGURE 4-1: (A) SCL (B) DATA TRANSFER SEQUENCE ON THE SERIAL BUS (D) (D) (C) (A) SDA Start Condition Address or Acknowledge Valid Data Allowed to Change Stop Condition FIGURE 4-2: ACKNOWLEDGE TIMING Acknowledge Bit 1 2 3 4 5 6 7 8 9 1 2 3 SCL SDA Data from transmitter Transmitter must release the SDA line at this point allowing the Receiver to pull the SDA line low to acknowledge the previous eight bits of data. Data from transmitter Receiver must release the SDA line at this point so the Transmitter can continue sending data. (c) 2005 Microchip Technology Inc. DS21754F-page 7 24AA512/24LC512/24FC512 5.0 DEVICE ADDRESSING FIGURE 5-1: CONTROL BYTE FORMAT Read/Write Bit Chip Select Bits 0 A2 A1 A0 R/W ACK A control byte is the first byte received following the Start condition from the master device (Figure 5-1). The control byte consists of a 4-bit control code; for the 24XX512 this is set as `1010' binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1 and A0). The Chip Select bits allow the use of up to eight 24XX512 devices on the same bus and are used to select which device is accessed. The Chip Select bits in the control byte must correspond to the logic levels on the corresponding A2, A1 and A0 pins for the device to respond. These bits are in effect the three Most Significant bits of the word address. The last bit of the control byte defines the operation to be performed. When set to a one a read operation is selected and when set to a zero a write operation is selected. The next two bytes received define the address of the first data byte (Figure 5-2). Because all A15...A0 are used, there are no upper address bits that are "don't care". The upper address bits are transferred first, followed by the Less Significant bits. Following the Start condition, the 24XX512 monitors the SDA bus checking the device type identifier being transmitted. Upon receiving a `1010' code and appropriate device select bits, the slave device outputs an Acknowledge signal on the SDA line. Depending on the state of the R/W bit, the 24XX512 will select a read or write operation. Control Code S 1 0 1 Slave Address Start Bit Acknowledge Bit 5.1 Contiguous Addressing Across Multiple Devices The Chip Select bits A2, A1 and A0 can be used to expand the contiguous address space for up to 4 Mbit by adding up to eight 24XX512s on the same bus. In this case, software can use A0 of the control byte as address bit A16; A1, as address bit A17; and A2, as address bit A18. It is not possible to sequentially read across device boundaries. FIGURE 5-2: ADDRESS SEQUENCE BIT ASSIGNMENTS ADDRESS HIGH BYTE ADDRESS LOW BYTE CONTROL BYTE 1 0 1 0 A 2 A 1 A 0 R/W AAAAAA 15 14 13 12 11 10 A 9 A 8 A 7 * * * * * * A 0 CONTROL CODE CHIP SELECT BITS DS21754F-page 8 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 6.0 6.1 WRITE OPERATIONS Byte Write 6.3 Write Protection Following the Start condition from the master, the control code (four bits), the Chip Select (three bits) and the R/W bit (which is a logic low) are clocked onto the bus by the master transmitter. This indicates to the addressed slave receiver that the address high byte will follow after it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the next byte transmitted by the master is the high-order byte of the word address and will be written into the address pointer of the 24XX512. The next byte is the Least Significant Address byte. After receiving another Acknowledge signal from the 24XX512, the master device will transmit the data word to be written into the addressed memory location. The 24XX512 acknowledges again and the master generates a Stop condition. This initiates the internal write cycle and during this time, the 24XX512 will not generate Acknowledge signals (Figure 6-1). If an attempt is made to write to the array with the WP pin held high, the device will acknowledge the command, but no write cycle will occur, no data will be written and the device will immediately accept a new command. After a Byte Write command, the internal address counter will point to the address location following the one that was just written. The WP pin allows the user to write-protect the entire array (0000-FFFF) when the pin is tied to VCC. If tied to VSS or left floating, the write protection is disabled. The WP pin is sampled at the Stop bit for every Write command (Figure 1-1). Toggling the WP pin after the Stop bit will have no effect on the execution of the write cycle. Note: Page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually being written. Physical page boundaries start at addresses that are integer multiples of the page buffer size (or `page size') and end at addresses that are integer multiples of [page size - 1]. If a Page Write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page as might be expected. It is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary. 6.2 Page Write The write control byte, word address and the first data byte are transmitted to the 24XX512 in the same way as in a byte write. But instead of generating a Stop condition, the master transmits up to 127 additional bytes, which are temporarily stored in the on-chip page buffer and will be written into memory after the master has transmitted a Stop condition. After receipt of each word, the seven lower address pointer bits are internally incremented by one. If the master should transmit more than 128 bytes prior to generating the Stop condition, the address counter will roll over and the previously received data will be overwritten. As with the byte write operation, once the Stop condition is received, an internal write cycle will begin (Figure 6-2). If an attempt is made to write to the array with the WP pin held high, the device will acknowledge the command, but no write cycle will occur, no data will be written and the device will immediately accept a new command. (c) 2005 Microchip Technology Inc. DS21754F-page 9 24AA512/24LC512/24FC512 FIGURE 6-1: BYTE WRITE S T A R T CONTROL BYTE ADDRESS HIGH BYTE ADDRESS LOW BYTE S T O P P A C K A C K A C K A C K BUS ACTIVITY MASTER DATA SDA LINE BUS ACTIVITY S 1 0 1 0 AAA 0 210 FIGURE 6-2: BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY S T A R T PAGE WRITE CONTROL BYTE ADDRESS HIGH BYTE ADDRESS LOW BYTE S T O P P A C K A C K A C K A C K A C K DATA BYTE 0 DATA BYTE 127 AAA S10102100 DS21754F-page 10 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 7.0 ACKNOWLEDGE POLLING FIGURE 7-1: Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the Stop condition for a Write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master sending a Start condition, followed by the control byte for a Write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If no ACK is returned, then the Start bit and control byte must be resent. If the cycle is complete, then the device will return the ACK and the master can then proceed with the next Read or Write command. See Figure 7-1 for flow diagram. ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? Yes Next Operation No (c) 2005 Microchip Technology Inc. DS21754F-page 11 24AA512/24LC512/24FC512 8.0 READ OPERATION 8.3 Sequential Read Read operations are initiated in the same way as write operations with the exception that the R/W bit of the control byte is set to `1'. There are three basic types of read operations: current address read, random read and sequential read. Sequential reads are initiated in the same way as a random read except that after the 24XX512 transmits the first data byte, the master issues an acknowledge as opposed to the Stop condition used in a random read. This acknowledge directs the 24XX512 to transmit the next sequentially addressed 8-bit word (Figure 8-3). Following the final byte transmitted to the master, the master will NOT generate an acknowledge, but will generate a Stop condition. To provide sequential reads, the 24XX512 contains an internal address pointer which is incremented by one at the completion of each operation. This address pointer allows the entire memory contents to be serially read during one operation. The internal address pointer will automatically roll over from address FFFF to address 0000 if the master acknowledges the byte received from the array address FFFF. 8.1 Current Address Read The 24XX512 contains an address counter that maintains the address of the last word accessed, internally incremented by `1'. Therefore, if the previous read access was to address n (n is any legal address), the next current address read operation would access data from address n + 1. Upon receipt of the control byte with R/W bit set to `1', the 24XX512 issues an acknowledge and transmits the 8-bit data word. The master will not acknowledge the transfer but does generate a Stop condition and the 24XX512 discontinues transmission (Figure 8-1). FIGURE 8-1: S T A R T CURRENT ADDRESS READ CONTROL BYTE DATA BYTE S T O P P A C K N O A C K BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY S 10 10 AAA 1 210 8.2 Random Read Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, first the word address must be set. This is done by sending the word address to the 24XX512 as part of a write operation (R/W bit set to `0'). After the word address is sent, the master generates a Start condition following the acknowledge. This terminates the write operation, but not before the internal address pointer is set. Then, the master issues the control byte again but with the R/W bit set to a one. The 24XX512 will then issue an acknowledge and transmit the 8-bit data word. The master will not acknowledge the transfer but does generate a Stop condition which causes the 24XX512 to discontinue transmission (Figure 8-2). After a random Read command, the internal address counter will point to the address location following the one that was just read. DS21754F-page 12 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 FIGURE 8-2: BUS ACTIVITY MASTER S T A R T RANDOM READ CONTROL BYTE ADDRESS HIGH BYTE ADDRESS LOW BYTE S T A R T CONTROL BYTE DATA BYTE S T O P P A C K N O A C K SDA LINE BUS ACTIVITY S1010AAA0 210 A C K A C K A C K S 1 0 1 0 A A A1 210 X = "don't care" bit FIGURE 8-3: BUS ACTIVITY MASTER SDA LINE SEQUENTIAL READ CONTROL BYTE DATA (n) DATA (n + 1) DATA (n + 2) DATA (n + X) S T O P P A C K A C K A C K A C K N O A C K BUS ACTIVITY (c) 2005 Microchip Technology Inc. DS21754F-page 13 24AA512/24LC512/24FC512 9.0 9.1 PACKAGING INFORMATION Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXX T/XXXNNN YYWW Example: 24AA512 I/P e3 017 0510 8-Lead SOIC (208 mil) XXXXXXXX T/XXXXXX YYWWNNN Example: 24LC512 I/SM e3 0510017 8-Lead DFN-S XXXXXXX T/XXXXX YYWW NNN 14-Lead TSSOP Example: 24LC512 I/MF e3 0510 017 Example: XXXXXXXT YYWW NNN 4L512I 0510 017 Legend: XX...X Y YY WW NNN e3 * T Blank I E Note: Customer-specific information* Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. Temperature Commercial Industrial Extended In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. *Standard device marking consists of Microchip part number, year code, week code, and traceability code. For device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. DS21754F-page 14 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 8-Lead Plastic Dual In-line (P) - 300 mil (PDIP) E1 D 2 n 1 E A A2 c L A1 eB B1 p B Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB MIN INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10 MAX MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 .170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 (c) 2005 Microchip Technology Inc. DS21754F-page 15 24AA512/24LC512/24FC512 8-Lead Plastic Small Outline (SM) - Medium, 208 mil (SOIC) E E1 p D 2 n B 1 c A A2 L A1 Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B MIN .070 .069 .002 .300 .201 .202 .020 0 .008 .014 0 0 INCHES* NOM 8 .050 .075 .074 .005 .313 .208 .205 .025 4 .009 .017 12 12 MAX MIN .080 .078 .010 .325 .212 .210 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.78 1.97 1.75 1.88 0.05 0.13 7.62 7.95 5.11 5.28 5.13 5.21 0.51 0.64 0 4 0.20 0.23 0.36 0.43 0 12 0 12 MAX 2.03 1.98 0.25 8.26 5.38 5.33 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. Drawing No. C04-056 DS21754F-page 16 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 8-Lead Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S) - Saw Singulated (c) 2005 Microchip Technology Inc. DS21754F-page 17 24AA512/24LC512/24FC512 14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP) E E1 p D 2 n B 1 A c L A1 A2 Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic Units Dimension Limits n p A A2 A1 E E1 D L c B MIN INCHES NOM 14 .026 .035 .004 .251 .173 .197 .024 4 .006 .010 5 5 MAX MIN .033 .002 .246 .169 .193 .020 0 .004 .007 0 0 .043 .037 .006 .256 .177 .201 .028 8 .008 .012 10 10 MILLIMETERS* NOM MAX 14 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 4.90 5.00 5.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-087 DS21754F-page 18 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 APPENDIX A: Revision D Correction to Section 1.0, Electrical Characteristics. Revision E Correction to Section 1.0., Ambient Temperature Correction to Section 6.2, Page Write Revision F Add E3 (Pb-free) to marking examples. Updated Marking Legend and On-line Support. REVISION HISTORY (c) 2005 Microchip Technology Inc. DS21754F-page 19 24AA512/24LC512/24FC512 NOTES: DS21754F-page 20 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: * * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com In addition, there is a Development Systems Information Line which lists the latest versions of Microchip's development systems software products. This line also provides information on how customers can receive currently available upgrade kits. The Development numbers are: Systems Information Line CUSTOMER CHANGE NOTIFICATION SERVICE Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. 1-800-755-2345 - United States and most of Canada 1-480-792-7302 - Other International Locations (c) 2005 Microchip Technology Inc. DS21754F-page 21 24AA512/24LC512/24FC512 READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________ From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y N Literature Number: DS21754F FAX: (______) _________ - _________ Device: 24AA512/24LC512/24FC512 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS21754F-page 22 (c) 2005 Microchip Technology Inc. 24AA512/24LC512/24FC512 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package X Lead Finish Examples: a) b) 24AA512-I/P: Industrial Temp., 1.8V, PDIP package. 24AA512T-I/SM: Tape and Reel, Industrial Temp., 1.8V, SOIC package. 24AA512-I/ST14: Industrial Temp., 1.8V, 14-lead, TSSOP package. 24AA512-I/MF: Industrial Temp., 1.8V, DFN package. 24LC512-E/P: Extended Temp., 2.5V, PDIP package. 24LC512-I/SM: Industrial Temp., 2.5V, SOIC package. 24LC512T-I/SM: Tape and Reel, Industrial Temp., 2.5V, SOIC package. 24LC512-I/MF: Industrial Temp., 2.5V, DFN package. 24FC512-I/P: Industrial Temp., 2.5V, High Speed, PDIP package. 24FC512-I/SM: Industrial Temp., 2.5V, High Speed, SOIC package. 24FC512T-I/SM: Tape and Reel, Industrial Temp., 2.5V, High Speed, SOIC package 24LC512T-I/SM: Industrial Temp., 2.5V, SOIC package, Tape & Reel, Pb-free Device: 24AA512: 24AA512T: 24LC512: 24LC512T: 24FC512: 24FC512T: 512 Kbit 1.8V I2C Serial EEPROM 512 Kbit 1.8V I2C Serial EEPROM (Tape and Reel) 512 Kbit 2.5V I2C Serial EEPROM 512 Kbit 2.5V I2C Serial EEPROM (Tape and Reel) 512 Kbit 1 MHz I2C Serial EEPROM 512 Kbit 1 MHz I2C Serial EEPROM (Tape and Reel) c) d) e) f) g) Temperature Range: Package: I E = = -40C to +85C -40C to +125C Plastic DIP (300 mil body), 8-lead Plastic SOIC (208 mil body), 8-lead Plastic TSSOP (4.4 mm), 14-lead Micro Lead Frame (6x5 mm body), 8-lead h) i) P = SM = ST14 = MF = j) k) Lead Finish Blank= Standard 63%/37% Sn/Pb G = Pb-free (Pure Matte Sn) l) m) 24LC512-I/PG: Industrial Temp., 2.5V, PDIP package, Pb-free Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. (c) 2005 Microchip Technology Inc. DS21754F-page23 24AA512/24LC512/24FC512 NOTES: DS21754F-page24 (c) 2005 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2005 Microchip Technology Inc. DS21754F-page 25 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Alpharetta, GA Tel: 770-640-0034 Fax: 770-640-0307 Boston Westford, MA Tel: 978-692-3848 Fax: 978-692-3821 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 San Jose Mountain View, CA Tel: 650-215-1444 Fax: 650-961-0286 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8676-6200 Fax: 86-28-8676-6599 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Qingdao Tel: 86-532-502-7355 Fax: 86-532-502-7205 ASIA/PACIFIC India - Bangalore Tel: 91-80-2229-0061 Fax: 91-80-2229-0062 India - New Delhi Tel: 91-11-5160-8631 Fax: 91-11-5160-8632 Japan - Kanagawa Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459 EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4450-2828 Fax: 45-4485-2829 France - Massy Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Ismaning Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 England - Berkshire Tel: 44-118-921-5869 Fax: 44-118-921-5820 10/20/04 DS21754F-page 26 (c) 2005 Microchip Technology Inc. |
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